74HC series ICs are High-speed logic gates with very low power consumption that utilize advanced silicon-gate CMOS technology and 74HC390 is one of them. 74HC390 ICs is a dual decade counter which contains two independent ripple counters. The counter has four separate sections. The counter has two divide-by-2 sections and two divide-by-5 sections. Divide-by-2 sections share a common asynchronous master reset input ( 1MR ) and divide-by-5 sections also share another one ( 2MR ). These sections are normally used in a BCD decade or bi-quinary configuration. Divide-by-2 section and divide-by-5 section have separate Low to High triggered clock. The various combination can achieve a single divide by 100 counter.
The 74HC390 ICs have a wide operating range of VCC from 2 V to 6 V. Maximum current consumption is 160 uA through Icc and 1 uA per input pin. And the propagation delay is 14 ns. They can drive 10 LS-TTL loads at a time. Which means that the output pin of the counter can drive 10 TTL based Low-Power Schottky( LS ) input pins. They can provide 4 mA on outputs at 5 V VCC. They allow inputs and outputs up to VCC. Recommended operating VCC is 5 V. Load Current can reach up to 25 mA per output pin and 50 mA for overall pins in between 0 V to VCC.
|Operating Voltage Range||2.0 to 6.0 V|
|Input Current||1 uA|
|Powering Current||160 uA|
|Output Current at VCC||4 mA|
|Fan-Out||10 LS-TTL Load|
|Propagation Delay||14 ns|
|Temperature Range||-65 °C to +150 °C|
|1 Counter Output (1Q[0:3])||3, 5, 6, 7|
|2 Counter Output (2Q[0:3])||14, 11, 10, 9|
|Clock Input (1CP0, 1CP1,)||1, 4|
|Clock Input (2CP0, 2CP1,)||15, 12|
|Master Reset Input (1MR, 2MR)||2, 14|
|Power Supply (VCC)||20|