Description
The CD4013 comprises two independent D-type flip-flops with asynchronous set/reset inputs. When the set or reset pins go high, the appropriate output is immediately expressed on the outputs. When set and reset are both set to zero, the output displays the data at the input at the most recent low-to-high clock transition. The CD4013 dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. The logic level present at the "D" input is transferred to the Q output during the positive-going transition of the clock pulse Setting, or resetting is independent of the clock and is accomplished
by a high level on the set or reset line, respectively.
Features
- High-Voltage Type (20V Rating)
- Asynchronous Set-Reset Capability
- Static Flip-Flop Operation Retains State Indefinitely With Clock Level Either "High" Or "Low"
- Medium-Speed Operation- 16 MHz (Typ.)
- Clock Toggle Rate at 10V
- Standardized Symmetrical Output Characteristics
- 100% Tested for Quiescent Current at 20V
- Maximum Input Current Of 1-µA at 18 V Over Full Package Temperature Range
Specifications
| Part number | CD4013 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Operating Voltage |
3V-18V DC |
| Channels | 2 |
| Clock Frequency (Max) | 24 MHz |
| ICC | 600uA |
| IOL (Max) | 6.8mA |
| IOH (Max) | -6.8mA |
| Features | Balanced outputs, Standard speed (tpd > 50ns), Positive input clamp diode |
| Package | PDIP 14 |
| Country of Origin | China |